By Shubu Mukherjee
Architecture layout for tender Errors presents a accomplished description of the architectural strategies to take on the delicate errors challenge. It covers the hot methodologies for quantitative research of soppy error in addition to novel, not pricey architectural options to mitigate them.
To supply readers with a greater snatch of the wider challenge definition and resolution house, this publication additionally delves into the physics of sentimental mistakes and experiences present circuit and software program mitigation suggestions. there are many other ways this publication could be learn or utilized in a direction: as an entire direction on structure layout for delicate error masking the total publication; a brief direction on structure layout for tender blunders; and as a reference e-book on classical fault-tolerant machines.
This ebook is usually recommended for practitioners in semi-conductor undefined, researchers and builders in desktop structure, complex graduate seminar classes on delicate blunders, and (iv) as a reference booklet for undergraduate classes in computing device architecture.
- Helps readers build-in fault tolerance to the billions of microchips produced every year, all of that are topic to gentle errors
- Shows readers tips on how to quantify their delicate mistakes reliability
- Provides state of the art options to guard opposed to delicate errors
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Architecture Design for Soft Errors by Shubu Mukherjee